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SN74HC164PWR
IC SHFT REG SERIAL 8BIT 14-TSSOP
- Manufacturer
- Mfr. Part #SN74HC164PWR
- Package TSSOP (PW)-14
- Datasheet SN74HC164PWR DataSheet
- In Stock7638
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Specifications
| Package | Tape & Reel (TR),Cut Tape (CT) |
| Series | 74HC |
| ProductStatus | Active |
| LogicType | Shift Register |
| OutputType | Push-Pull |
| NumberofElements | 1 |
| NumberofBitsperElement | 8 |
| Function | Serial to Parallel |
| Voltage-Supply | 2V ~ 6V |
| OperatingTemperature | -40°C ~ 125°C |
| MountingType | Surface Mount |
| Package/Case | 14-TSSOP (0.173, 4.40mm Width) |
Overview
Description
The device allows data to be shifted in serially and then output in parallel, making it ideal for applications requiring data handling in limited pin configurations. The SN74HC164PWR includes a clock input that controls the shifting process and can handle both rising and falling clock edges. The outputs are typically capable of driving loads, making them useful for interfacing with other logic ICs, LEDs, or microcontrollers.
Key features include low power consumption, high noise immunity, and the ability to drive TTL loads. The package is in a TSSOP (Thin Shrink Small Outline Package) format, making it suitable for space-constrained designs. This component is commonly used in LED displays, data serialization, and data transfer applications in both consumer and industrial electronics.
Features
1. Logic Family: Part of the HC (High-speed CMOS) series, offering high-speed operation and low power consumption.
2. Input Voltage: Operates with a wide voltage range (2V to 6V), making it versatile for various applications.
3. Data Format: Serial input allows for data to be shifted in one bit at a time, with parallel output capabilities.
4. Shift Direction: Data is shifted on the rising edge of the clock input.
5. Output Configuration: Provides 8 parallel outputs, which can drive TTL-compatible loads.
6. Maximum Clock Frequency: Capable of operating at high clock frequencies (up to 25 MHz at 5V).
7. Tri-State Outputs: Outputs can be disabled (high impedance) for easy bus sharing.
8. Temperature Range: Suitable for operation in standard commercial temperature ranges (0°C to 70°C).
This device is commonly used in applications requiring data storage, transfer, and control in digital circuits.
Package
Pinout
1. Pin 1 (Q7'): Output of the last flip-flop.
2. Pin 2 (Q6): Output of the sixth flip-flop.
3. Pin 3 (Q5): Output of the fifth flip-flop.
4. Pin 4 (Q4): Output of the fourth flip-flop.
5. Pin 5 (Q3): Output of the third flip-flop.
6. Pin 6 (Q2): Output of the second flip-flop.
7. Pin 7 (Q1): Output of the first flip-flop.
8. Pin 8 (GND): Ground.
9. Pin 9 (SER): Serial data input.
10. Pin 10 (SRCLK): Shift register clock input.
11. Pin 11 (RCLK): Register clock input, latches the output.
12. Pin 12 (OE): Output enable; active low.
13. Pin 13 (VCC): Power supply.
14. Pin 14 (Q0): Output of the zeroth flip-flop.
15. Pin 15 (R1): Reserved (not connected).
16. Pin 16 (R2): Reserved (not connected).
This device operates at high speeds and is often used in applications requiring efficient data handling.
Manufacturer
Application
Equivalent
Shipping
Shipping MethodsWe
offer global shipping services through DHL, FedEx, TNT, UPS, or any other forwarder of your choice.
Shipping Fee Reference (DHL/FedEx):
DHL: Shipping cost ranges from $25-$45 (0.5kg), with an estimated delivery time of 2-5 business days.
FedEx: Shipping cost ranges from $25-$40 (0.5kg), with an estimated delivery time of 3-7 business days.
UPS: Shipping cost ranges from $25-$45 (0.5kg), with an estimated delivery time of 3-7 business days.
TNT: Shipping cost ranges from $25-$65 (0.5kg), with an estimated delivery time of 3-7 business days.
EMS: Shipping cost ranges from $30-$50 (0.5kg), with an estimated delivery time of 7-15 business days.
Registered Air Mail: Shipping cost is $2-$4 (0.1kg), with an estimated delivery time of 5-20 business days.
Payments
Payment Methods
The Payment term is 100% Prepaid.
Currently, we only accept the below payment methods:
1. PayPal
2. Credit/ Debit Card
3. Wire Transfer
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